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Bus project

Project goal:

This project's goal is to design a bus system which enables data transfer between multiple electronic circuits.

Status:

Working prototype.

Requirements/specifications:

Open design: Releasing all specifications, designs, and program code to the public, enables designers to quickly adopt this bus system, and guarantees its availability.
Minimum component design: Making it possible to connect a microcontroller directly to the bus, enables small designs with only one chip.
Existing hardware: Uses existing components which are cheap and highly available.
Independent: Runs on every sufficiently powerful microcontroller. This avoids dependence on a particular vendor or microcontroller family.
Inexpensive: The system's flexibility, small number of required components and today's prices for suitable microcontrollers, enable a very inexpensive solution, even for small-scale and private applications.
Peer-to-peer ability: Connected devices can communicate independently with every other connected device. No bus master required.
Variable bus clock: The bus clock speed is not restricted to a fixed frequency. A developer can determine for him or herself the balance between cost, bus length and transfer rate. Bus speeds may vary even when the bus is in use, obviating the need for a crystal resonator to drive the bus clock.
Scalability: By choosing variable length addresses (and making a number of other fields variable in length) the number of devices that can be connected to the bus simultaneously is theoretically unlimited. In limited setups the packed length will still be small.
Automatic address election: The automatic address election process selects a nearly optimal address length for a given bus configuration, and allows multiple similar devices to be connected at the same time. Of course the ability to set fixed addresses exists as well.
Optional power supply: If required, the bus can be extended with power lines. This removes the need for individual power supplies for connected devices.
Multisupply: If devices on the bus draw a lot of power, or if the bus is long, the bus may be supplied with power at as many injection points as desired.
Device identification: Each type of device has a unique identifier, allowing other devices to recognize and control it.
Fault tolerance: The chance of transmission errors is minimized by using CRC error detection. In addition, standard options to protect against overvoltage and ESD peaks are available.
Collision avoidance: No time is wasted due to bus collisions.

Notes

last updated: Fri Jan 18 15:02:12 UTC 2002